SystemBase
SB16C1053APCI
Built-In two improved UART with 256 Byte FIFO & 9-bit Communication, Support Serial Speed up to 921.6Kbps, Enhanced Auto Toggling for RS422 and RS485 networks
Artikelnummer VAR-827001610
Description
SB16C1053APCI is a PCI target interface controller with dual-UART, single parallel port and MIO Bus. It offers easy PCI target card implementation for serial port and parallel port. The SB16C1053APCI provides high performance serial and parallel port communication. With a built-in 2 SB16C1050A core that has built-in 256-byte FIFO, SB16C1053APCI decreases CPU load. It detects errors such as overrun error and works well with simultaneous use of multiple ports. Furthermore, it is capable of waking up PC that is powered off through interrupts or wake-up requests with PCI power management implemented. The SB16C1053APCI supports up to 6 serial ports, providing RS422/485 auto toggling function and global interrupt function to built-in UART allowing a more convenient handling of serial communication at the driver level. Finally, with SB16C1053APCI, it is easy to design various types of serial and parallel multi-port products as shown below:
– 1-port Serial Multi-Port PCI Card (1S mode)
– 2-port Serial Multi-Port Card (2S mode)
– 4-port Serial Multi-Port Card (4S mode)
– 6-port Serial Multi-Port Card (6S mode)
– 1-port Parallel Multi-Port Card (1P mode)
– 2-port Serial and 1-port Parallel Multi-Port Card (2S1P mode)
Art.-ID | 101364 |
Zustand | Neu |
Hersteller | SystemBase |
Herstellungsland | Demokratische Volksrepublik Korea |
Inhalt | 1 Stück |
Features
PCI Interface | Compliant with PCI Local Bus Specification 2.3 |
---|---|
Supports 32-bit Bus / 33MHz and 66MHz | |
Supports PCI Power Management 1.2 | |
Supports CompactPCI and CompactPCI Hot Swap | |
Download Configuration Data from external serial EEPROM | |
UART Interface | 2 Channel High Performance UART with 16C1050A core compatible with |
16C554 and 16C654 Register Set | |
Up to 5.3 Mbps Baud Rate (Up to 85 MHz Oscillator Input Clock) | |
256 Byte Transmit FIFO | |
256 Byte Receive FIFO with Error Flags | |
Programmable and Selectable Transmit and Receive FIFO Trigger Levels | |
for Interrupt Generation | |
9-bit Communication (Multi-drop with Auto Address Detection) | |
Software (Xon/Xoff) / Hardware (RTS#/CTS#) Flow Control | |
Interrupt Poll Control | |
Optional Data Flow Resume by Xon Any Character Control | |
Optional Data Flow Additional Halt by Xoff Re-transmit Control | |
Control pins for RS-422 Point to Point/Multi-Drop Auto Control | |
Control pins for RS-485 Echo/Non Echo Auto Control | |
Programmable Auto Control signal assertion width of TXEN and nRXEN | |
Software Selectable Baud Rate Generator | |
Prescaler Provides Additional Divide-by-4Function | |
Programmable Sleep Mode | |
Programmable Serial Interface Characteristics 5, 6, 7, 8 or 9-bit Characters Even, | |
Odd, or No Parity Bit Generation and Detection 1, 1.5, or 2 Stop Bit Generation | |
Detection False Start Bit | |
Line Break Generation and Detection | |
Fully Prioritized Interrupt System Controls | |
Modem Control Functions (RTS#, CTS#, DTR#, DSR#,DCD#, and RI#) | |
Parallel Port Interface | Support All IEEE 1284 Protocols Standard |
Support Compatibility Mode, Nibble Mode, Byte Mode, EPP Mode and ECP Modes | |
16 Byte FIFO for SPP/ECP mode | |
It can be used 8-bit Legacy Local Bus for external 4 serial ports instead of parallel port | |
Other Information | 3.3V I/O, 5V Input Tolerance |
Operating Temperature, -40℃~ 85℃ | |
TQFP128 Package |